Reconfigurable FET device with dual doping for fast and low-voltage reprogrammable logic

  • Universidad de Granada
  • From Spain
  • Responsive
  • Patents for licensing

Summary of the technology

New reconfigurable FET device (R-FET) with a dual PN doping at source and drain that is useful even in low power applications.

The configuration with dual doping proposed in the invention makes it possible to modulate the polarity of the device at all times and obtain a high current for both polarities, thus solving the problems of low performance that characterize the usual R-FET transistors.

Details of the Technology Offer

Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) are an essential part of almost any electronic component today. Currently, more than 90% of the consumer electronics manufactured uses CMOS (Complementary MOS) technology, which allows two complementary MOSFET transistors (N-channel and P-channel) to be coupled simultaneously.

In recent years, the object of study has been focused on the development of reconfigurable transistors (R-FET, Reconfigurable FET) [1, 2]. These stand out for combining both types of transistors (N, with electron charge carrier, and P, with hollow charge carrier) and allow the polarity (N or P) to be modulated at all times, thus reducing the number of necessary components. The modulation of polarity in this type of transistors has traditionally been achieved through the use of metal-semiconductor structures, called Schottky junctions. However, the low output current of these devices and their low performance make them unviable for low power applications [3].

For solving these problems, a new reconfigurable FET device has been developed [4, 5] that uses doped regions of the N and P types as source and drain simultaneously, which allows solving the main limitations of traditional R-FET devices. The structure of the proposed device is based on dual doping in such a way that source and the drain present two differentiated portions for each type of doping (N and P). This dual configuration allows obtaining a high injection for both polarities without resorting to Schottky contact.

The elimination of metal-semiconductor junctions in this device through the alternative of semiconductor-semiconductor junctions causes a substantial increase in the current obtained, from 30 to 2500 times according to conservative TCAD simulations [4].

This technology facilitates the manufacture of these transistors and also provides an improvement in the performance of conventional R-FET devices, making them an option for low power applications.

ADVANTAGES AND BENEFITS:

  • Performance improvement.The dual doped configuration for the source and the drain of this device allows to obtain a high injection for both polarities without having to resort to Schottky contacts, thus notably increasing the currents obtained.
  • Simple manufacturing.The absence of metal-semiconductor junctions in source and drain avoids lateral metallization steps, thus simplifying the manufacturing process of these new devices.
  • Less metallization variability.The absence of metal-semiconductor junctions eludes the use of exotic metals and the Fermi Level Pinning effect.
  • Ease of current modulation N / P.The lithographic masks, which define the doping regions, can be arbitrarily set in both polarities to obtain any desired current ratio between polarities.
  • Possibility of using traditional strategies to improve the mobility of carriers.
  • Functional for low power applications.The double doping of the device allows higher current densities to be obtained than in habitual R-FET devices, making it feasible to use it for low power applications.

Additional references:

[1] A. Heinzig, S. Slesazeck, F. Kreupl, T. Mikolajick and W. M. Weber, “Reconfigurable Silicon Nanowire Transistors”, Nano Lett., 12(1), pp. 119-124, 2012. doi: 10.1021/nl203094h.

[2] J. Trommer and A. Heinzig and S. Slesazeck and T. Mikolajick and W.M. Weber, “Elementary Aspects for Circuit Implementation of Reconfigurable Nanowire Transistors”, IEEE Electron Device Lett., 35(1), pp. 141-143, 2014. doi: 10.1109/LED.2013.2290555.

[3] C. Navarro, S. Barraud, S. Martinie, J. Lacord, M.-A. Jaud and M. Vinet, “Reconfigurable field effect transistor for advanced CMOS: Advantages and limitations”, Solid-State Electron., 128, pp. 155-162, 2017. doi: 10.1016/j.sse.2016.10.027.

[4] Carlos Navarro, Carlos Márquez, Santiago Navarro y Francisco Gámiz ,“Dual PN Source/Drain Reconfigurable FET for Fast and Low-Voltage Reprogrammable Logic”, IEEE Access, 8(2), pp. 132376-132381. DOI:10.1109/ACCESS.2020.3009967.

[5] Carlos Navarro, Carlos Márquez, Santiago Navarro y Francisco Gámiz, “Dispositivo FET reconfigurable con dopado dual”, solicitud de patente nº P202030318, 20 abril, 2020.

Desired business relationship

Patent licensing

Applications

Semiconductor products

Intellectual property status

  • Patent already applied for
  • Patent application number :P202030318

Related Keywords

  • Semiconductors Technology
  • Semiconductors Market
  • transistor
  • electron
  • fet
  • reconfigurable
  • r-fet
  • reprogrammable
  • dual doping
  • polarity
  • hole

About Universidad de Granada

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