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Background
SET and RESET operations are fundamental operations in Resistive Random Access Memory (RRAM). Most techniques for programming RRAM-based Compute In Memory (CIM) cells use an iterative write-verify algorithm. However, given the state-of-the-art AI models often have over 100 million parameters, simply increasing the memory size leads to yield issues and prolonged programming times due to significant write variations in RRAM cells. To address this, optimizing the conventional write-verify algorithm for multi-level programming is crucial.
Description of the invention
Researchers at the University of Waterloo have developed a state aware write-verify algorithm based on the transient characteristics of RESET behavior which significantly reduces the average write time. Using a feedback mechanism, the algorithm predicts and tunes parameters for multi-level programming of RRAMs. Instead of pulse strengths, the algorithm utilizes pulse length to tune the states (write bits) in multi-level/multi-bit RRAM cells hence significantly increases the average write operation speed. The algorithm was successfully tested in programming of the in-house fabricated multi-level TiN/TiOx/TiN resistive switching RRAM cells.
Advantages
Potential applications
The algorithm is applicable to multi-bit RRAMs used in:
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